Monday, September 13, 2010

p11 3D Integration Technology for Energy Efficient System Design

ABSTRACT
CMOS scaling will continue, doubling transistor integration
capacity every two years, providing billions of transistors to enable
future novel systems. 3D integration technology will open the doors
even further, changing the landscape and allowing integration of
diverse functionality to realize energy-efficient and affordable
complex systems that will continue to deliver higher performance.
This paper presents how to exploit this new technology for energy
efficient system design.

INTRODUCTION
Technology scaling treadmill will continue to follow Moore's
Law, providing integration capacity of billions, even trillions of
transistors, improving transistor performance, providing abundance
of interconnections to realize complex architectures, and reducing the
cost of transistor integration by half every generation.

First, the transistor performance improvement will be limited, and
you will not see historic doubling of frequency every two years.

The system designers will have to continue to deliver ever
increasing performance despite these challenges.